Discrete increment signal processing systems process an input signal by effecting discrete incremental changes in a signal attribute (such as phase or amplitude). A conventional configuration for a discrete increment signal processing system (e.g., an incremental phase shift system) includes a cascade of N binary-state processing networks (e.g., phase shift networks), each switchable between two incremental signal attribute states (e.g., incremental phase shift states), such that the discrete increment system processes an input signal to effect one of 2.sup.N total signal attribute states (e.g., phase states) for the output signal.
Discrete increment signal processing systems are widely used for such applications as incremental phase shifters or attenuators. In an exemplary discrete increment phase shift system, N binary-state phase shift networks are cascaded to provide 2.sup.N phase shift increments. One principal application for radio frequency (RF) phase shift systems is in electronically controlled phased array radar systems.
Phased array radar systems use an antenna that does not require any mechanical movement for beam steering, allowing a complete antenna scan in several hundred nanoseconds. Thus, a phased array system using an electronically steered beam is advantageous for most antenna steering applications, provided that it can be made comparable to the mechanically steered alternative in terms of cost, reliability, bandwidth, signal-to-noise ratio, dynamic range, insertion loss (signal power attenuation) and the third order intercept point.
Electronic phased array radars use phase shift systems to generate multiple phase-shifted RF signals that combine (interfere) to produce a directed beam that can be scanned by controlling the phase shift system. A discrete increment, solid state implementation of an RF phase shift system is generally preferred since large phased arrays are normally steered by a digital computer.
Discrete increment phase shift systems conventionally use cascaded binary-state phase shift networks. Binary-state phase shift networks are of two major types--loaded-line and switched-line (reflective phase shift networks are assumed to be a subset of switched-line phase shift networks). Due to phase accuracy, low inherent insertion loss and low insertion loss variations at small phase increments, loaded-line networks are generally preferred for the least significant binary phase digits or phase bits (i.e., small phase increments). Switched-line networks are preferred for the most significant phase bits (i.e., large phase increments) because loaded line networks exhibit relatively larger phase errors and insertion loss variations at the larger phase increments. Thus, a conventional five-bit phase shift system will include a loaded-line phase shift network as the least significant bit (and possibly the next least significant bits) and switched-line networks for the other phase bits.
One significant problem with switched-line phase shift networks is that significant insertion loss is inherent because active devices are used as control elements for the parallel branched lines (phase increment circuits). Thus, significant additional gain is required by the channel amplifier chain to overcome the insertion loss of the phase shift network and maintain overall channel gain. As a result, reducing phase shifter insertion loss is critical to phased array systems, particularly those using switched-line phase shift networks.
Reducing phase shifter insertion loss for both the receive and transmit channels requires additional gain stages, improved-noise-figure low noise amplifiers, additional parts count and increased power consumption, and causes reduced module efficiencies. Each of these factors directly affects feasibility, producibility and cost of phased array systems.
Present monolithic X-Band five-Bit (binary-state) switched-line phase shift systems using ion-implanted field effect transistors as the branch control elements exhibit approximately 7 dB insertion loss. Corresponding phase shifters using PIN diode control elements exhibit approximately 4 dB insertion loss.
Accordingly, a need exists in general for a more flexible design approach to discrete increment signal processing systems, and in particular for a phase shift network with reduced insertion loss over that currently available using only binary-state networks (switched-line and/or loaded-line).